Secured hardware design

• Overview
• DES / 3DES
• AES
• RSA & ECC
• Secured hardware design

Tiempo asynchronous cryptoprocessors IP cores are very well protected against hardware attacks. This high-level of resistance is both inherited from the natural properties of our clockless designs as well as from specific counter-measures suited to asynchronous circuits designed and patented by Tiempo.

In particular Tiempo IP cores are robust to:

• Power-analysis based attacks
• Fault injections

Additionally, each IP core from Tiempo can be delivered with optional hardware security measures dedicated to the IP specific functions.