Cryptoprocessors IP cores: RSA & ECC

TPKA (Tiempo public key accelerator), is an accelerator for RSA and ECC encryption. It implements key routines in order to perform complex ciphering algorithms within embedded systems.

Key benefits

RSA-ECC accelerator block diagram
RSA-ECC accelerator block diagram
  • Ultra-low power consumption
  • Ultra-low current peaks
  • Work at low and variable voltage
  • Resistant to power and fault attacks

Key Features

  • Fast execution of standard RSA and ECC ciphering and deciphering algorithms
  • Fully asynchronous and delay insensitive
  • Available as Verilog netlist[1] ready for P&R
  • Optional: Verilog netlist[1] secured against hardware attacks
  • Optional: Verilog netlist[1] strengthened for ultra-low noise and ultra low EMI


Targeted applications are chips for smartcards (with or without contact), RFID, tags, systems embedding NFC technology and other secured applications.

Electrical characteristics

Figures below are based on electrical simulations on TSCM130LP 1.5V process after Place & Route. Simulations are run on the secured version of the IP.

Supply voltage range1.0V1.5V
RSA CRT 1024 average current consumption 1.89 mA 8.5 mA
RSA CRT 1024 execution time 36.3 ms 12.7 ms

[1]Please contact Tiempo for available libraries and technologies