Technology

Overview

Tiempo offers a technology for the design of asynchronous and delay insensitive integrated circuits

  • Tiempo asynchronous circuits are fully clockless, meaning that they are self-controlled and their behavior is governed by signal transition handshakes and signal levels memorization
  • Because the circuits do not rely on a knowledge of timing, functional correctness is ensured regardless of any actual delay through gates and wires. This makes Tiempo’s circuits very resistant to perturbations that traditionally impact timing, such as the manufacturing process, or changes in voltage or temperature
  • Tiempo implementation allows designs with both ultra-low power and high performances
  • Tiempo technology can be described with high-level models, in standard language and implemented using an optimized high-level synthesis tool from Tiempo, called Asynchronous Circuit Compiler (ACC). The tool accepts as input SystemVerilog models and generates an optimized Verilog gate-level netlist.

Tiempo Technology Overview

Tiempo clockless design technology compared to traditional clocked circuits

White Papers

White Paper #1: Technology Introduction
  • This document provides a preliminary introduction to Tiempo unique asynchronous and delay-insensitive design technology, targeting any audience who wish to get a first glance at it.
  • Download in PDF format: A4 format / Letter format (237 ko)
White Paper #2: Introduction to SystemVerilog Asynchronous Modeling
  • This document is a first introduction on Tiempo SystemVerilog coding style that is used to write high-level synthesizable models of circuits designed in Tiempo unique asynchronous and delay-insensitive technology.
  • Download in PDF format: A4 formatLetter format (286 ko)
White Paper #3: Introduction to Testing Tiempo Asynchronous Circuits
  • This document gives an understanding of the key properties inherent to Tiempo asynchronous circuits and suggests a smart revisiting and re-use of existing testing approaches developed for synchronous circuits.
  • Download in PDF format: A4 formatLetter format (537 ko)